Various techniques for customization and alteration of integrated circuits have been proposed. Such techniques find potential application in integrated circuit design and testing as well as in redundant memory repair, where defective memory blocks are replaced by "stand by" working memory modules via alteration of the address decoder incorporated in the integrated circuit itself.
The introduction of changes in the routing of electrical conductors in an integrated circuit is inherently difficult due to the relatively small dimensions involved. The typical width of electrical conductors and the spacing between adjacent conductors in modern integrated circuits is about 1-3 microns.
It has been proposed to effect such rerouting by the use of an ultrasonic cutter followed by the application of a thin metal wire between elements to be connected. See D. Platteter, IEEE Reliability Physics Symposium, 1976, p 248.
It has also been proposed to employ a photolithographic process for customizing integrated circuits, involving the use of a laser or electron beam for direct pattern definition on a photoresist layer, followed by an etch process or a "lift off" metal definition process. See J. Melngailis, C.R. Musil, J. Nac. Sci. Technol. B4(1), Jan., 1986, page 176 and J.C. Logue, W.K. Kleinfelder, P. Lowy, J.R. Moulic, W.W. Wu. IBM J. Res. Develop. 25(3), May, 1981, p 107.
It has also been proposed to provide normally open electrical switches in integrated circuits for providing selectable connections between two normally electrically isolated locations. These electrical switches are imbedded in solid state devices and are closed by the application thereto of a laser pulse. Specifically it has been proposed to provide connections in integrated circuits by applying laser energy to a bridge formed of a polyimide insulator. See J I. Raffel, J.F. Freidin and G.H. Chapman, Laser-formed connections using polyimide, Appl. Phys. Lett. 42(8), 15 Apr., 1983. This technique suffers from the disadvantage that polyimides are relatively poor insulators.
It has also been proposed to produce laser formed links defined between two aluminum conductors deposited on insulating polysilicon. See J.A. Yasaitis, G.H. Chapman and J.I. Raffel, Low Resistance Laser Formed Lateral Links, IEEE Electron Device Letters, Vol EDL-3, No. 7. July, 1982. This proposal suffers from excessively high leak resistance due to the difficulty of attaining a suitable 12 nm SiO.sub.2 layer as called for.
Additionally it has been proposed to produce laser formed links between two layers of aluminum conductor separated by a silicon dioxide, amorphous silicon sandwich. See J.I. Raffel, A.H. Anderson, et al, A Wafer-Scale Digital Integrator Using Restructurable VSLI, IEEE Journal of Solid-State Circuits, Vol SC-20, No. 1, Feb., 1985, pp 399-401. This technique is not susceptible of industrial application because of very high capacitances associated with relatively large switch areas.
There is shown in U.S. Pat. No. 4,636,404 a method and apparatus for reliably forming low resistance links between two aluminum conductors deposited on an insulating polysilicon or amorphous silicon layer, employing a laser to bridge a lateral gap between the conductors. The apparatus and method are suited for implementing defect avoidance using redundancy in large random access memories and in complex VLSI circuits. Only a single level of metal is employed and leads to both higher density and lower capacitance in comparison to prior techniques. Resistances in the range of one to ten ohms are achieved for gap widths of approximately two to three microns.